1. Field of the Invention
The present invention relates to an apparatus for and a method of processing data as a timer or counter by selecting one of either a first basic clock signal generated by a first clock generator or a second basic clock signal generated by a second clock generator as a system clock signal and counting clock pulses of the system clock signal up to a predetermined numerical value thereby to generate a timing signal.
2. Description of the Related Art
Heretofore, clock generators for generating basic clock signals for data processing apparatus generally include a quartz-crystal oscillator and an RC (resistance-capacitance) oscillator. The quartz-crystal oscillator is better than the RC oscillator with respect to oscillation accuracy. However, the RC oscillator is cheaper and takes up a smaller installation space than the quartz-crystal oscillator as the quartz-crystal oscillator needs an expensive quartz resonator and requires a larger installation area.
One data processing apparatus has both a quartz-crystal oscillator and an RC oscillator, and employs the quartz-crystal oscillator when higher oscillation accuracy is required and employs the RC oscillator when a clock timer operates at a low rate that does not require high oscillation accuracy.
FIG. 1 of the accompanying drawings shows such a conventional data processing apparatus. As shown in FIG. 1, the data processing apparatus comprises a microcomputer 101 having a quartz-crystal oscillator 11 and an RC oscillator 12. The quartz-crystal oscillator 11 generates a first basic clock signal having a higher frequency, and the RC oscillator 12 generates a second basic clock signal having a lower frequency.
These oscillators 11, 12 are connected to a clock selector 13 that is connected to a clock timer 14. The clock selector 13 and the clock timer 14 are connected to a bus 15 to which there are connected a data processing circuit 16 and an external terminal control circuit 17.
The data processing circuit 16 has a CPU (Central-Processing Unit) 18, a ROM (Read-Only Memory) 19, and a RAM (Random-Access Memory) 20. The external terminal control circuit 17 is connected to an external terminal 21 for receiving signals from and transmitting signals to an external circuit.
The ROM 19 stores software such as a control program for the CPU 18. The RAM 20 has a work area for temporarily storing data processed by the CPU 18. According to signals supplied from the external terminal 21 and the control program stored in the ROM 19, the CPU 18 executes various data processing modes while using the work area of the RAM 20 for thereby controlling the clock selector 13 and the clock timer 14.
When controlled by the data processing circuit 16, the clock selector 13 selectively outputs either the first or the second basic clock signals as a system clock signal. Clock pulses of the system clock supplied from the clock selector 13 are repeatedly counted by the clock timer 14 up to a predetermined numerical value which has been established in advance by the data processing circuit 16. Each time the clock timer 14 counts clock pulses up to the predetermined numerical value, the external terminal control circuit 17 generates a pulse signal as a timing signal.
If the microcomputer 101 functions as a timer, for example, pulse signals generated by the external terminal control circuit 17 are transmitted from the external terminal 21 to external circuits. If the microcomputer 101 functions as a counter, for example, various signals supplied from external circuits to the external terminal 21 are counted by pulse signals generated by the external terminal control circuit 17. The system clock signal is also supplied directly to the CPU 18, the ROM 19, and the RAM 20 of the data processing circuit 16 for use as a reference clock signal for the CPU 18, the ROM 19, and the RAM 20.
The data processing apparatus shown in FIG. 1 is capable of generating pulse signals having various frequencies with respect to control data supplied from the external terminal 21 to the external terminal control circuit 17. For example, if the system clock signal supplied to the clock timer 14 has a frequency of 1 KHz and a period of 1 msec., then in order to output a high-level pulse signal having a period of 60 msec. to the external terminal 21, the data processing circuit 16 establishes a numerical value of 60 up to which the clock timer 16 counts clock pulses.
The data processing circuit 16 first clears the count of the clock timer 14, and then controls the external terminal control circuit 17 to output a low-level signal and then a high-level signal. At the same time, the data processing circuit 16 controls the clock timer 14 to start counting system clock pulses, and controls the external terminal control circuit 17 to output a low-level signal to the external terminal 21 each time the count of the clock timer 14 reaches the numerical value of 60. Since the signal outputted from the external terminal 21 changes from a high level to a low level at the period of 60 msec., the data processing apparatus outputs a pulse signal having the period of 60 msec.
If higher accuracy is required for counting system clock pulses to produce the above pulse signal, then the first basic clock signal generated by the quartz-crystal oscillator 11 is used as the system clock signal. On the other hand, if an energy saving requirement has to be met, then the second basic clock signal generated by the RC oscillator 12 is used as a system clock signal.
The frequencies of the basic clock signals generated by the oscillators 11, 12 have been determined beforehand, and numerical values up to which clock pulses are counted are established on the basis of these predetermined frequencies. The RC oscillator 12 is used in occasions where higher accuracy is not required for pulse signals. However, the accuracy of the generated pulse signal may occasionally be lowered below a tolerable range.
Specifically, the frequency of the basic clock signal generated by the RC oscillator 12 tends to vary greatly from an ideal value due to manufacturing error, operating voltage, ambient temperature, etc. of the resistor and capacitor of the RC oscillator 12, unduly lowering the accuracy of the generated pulse signal. For example, if the period of the second basic clock signal generated by the RC oscillator 12 varies from an ideal value of 1.0 msec. to 1.2 msec. due to a change in the resistance or capacitance of the RC oscillator 12, then the period of the pulse signal increases from 60 msec. to 72 msec.
In order to increase the pulse signal accuracy of the RC oscillator, it has been proposed to add a built-in variable component circuit for adjusting the resistance or capacitance of the RC oscillator in a data processing apparatus disclosed in Japanese laid-open patent publication No. 7-15237. If such a built-in variable component circuit is fabricated as a general MOS (Metal Oxide Semiconductor), the data processing apparatus will necessarily increase in size as the built-in variable component circuit cannot be manufactured in a small size.